http://en.wikipedia.org/wiki/Transputer
A transputer is an device/emulator that runs Communicating Sequental Proccesses.
Also the basis for the Transterpreter system[
1] written in pure ANSI C.
(dreging info from http://svn.transterpreter.org/transterpreter/trunk/interpreter/dispatch_ins.c)
stack based system
instruction set is bytecode based with the distinction that
first nybble is the main opcode and the second nybble is appended to
an (unspecified long/32 bit?) operand register and the contents of that register is then taken as immideate operand.
opcode: memnomic: description
0x0 j Jump — add immediate operand to instruction pointer.
0x1 ldlp Load Local Pointer — load a Workspace-relative pointer onto the top of the register stack
0x2 pfix Prefix — general way to increase lower nibble of following primary instruction
0x3 ldnl Load non-local — load a value offset from address at top of stack
0x4 ldc Load constant — load constant operand onto the top of the register stack
0x5 ldnlp Load Non-local pointer — Load address, offset from top of stack
0x6 nfix Negative prefix — general way to negate (and possibly increase) lower nibble
0x7 ldl Load Local — load value offset from Workspace
0x8 adc Add Constant — add constant operand to top of register stack
0x9 call Subroutine call — push instruction pointer and jump
0xA cj Conditional jump — depending on value at top of register stack
0xB ajw Adjust workspace — add operand to workspace pointer
0xC eqc Equals constant — test if top of register stack equals constant operand
0xD stl Store local - store at constant offset from workspace
0xE stnl Store non-local - store at address offset from top of stack
0xF opr Operate - general way to extend instruction set
the opr instruction extends the instruction set by switching on the value of the operand register.
the extended instruction set is as follows:
0x00 rev
0x01 lb
0x02 bsub
0x03 endp
0x04 diff
0x05 add
0x06 gcall
0x07 in
0x08 prod
0x09 gt
0x0A wsub
0x0B out
0x0C sub
0x0D startp
0x0E outbyte
0x0F outword
0x10 seterr
0x11 mreleasep __PI_SUPPORT__
0x13 csub0
0x14 extvrfy __PI_SUPPORT__
0x15 stopp
0x16 ladd
0x19 norm
0x1A ldiv
0x1B ldpi
0x1D xdble
0x1F rem
0x20 ret
0x21 lend
0x22 ldtimer
0x23 boolinvert
0x24 widenshort
0x25 fficall
0x26 lend3
0x27 lendbw
0x28 reschedule
0x2B tin
0x2C div
0x2E dist
0x2F disc
0x30 diss
0x31 lmul
0x32 not
0x33 xor
0x35 lshr
0x36 lshl
0x37 lsum
0x38 lsub
0x39 runp
0x3B sb
0x3C gajw
0x3E saveh
0x40 shr
0x41 shl
0x42 mint
0x43 alt
0x44 altwt
0x45 altend
0x46 and
0x47 enbt
0x48 enbc
0x49 enbs
0x4A move
0x4B or
0x4C csngl
0x4D ccnt1
0x4E talt
0x4F ldiff
0x51 taltwt
0x52 sum
0x53 mul
0x55 stoperr
0x56 cword
0x5A _dup __FPU_SUPPORT__
0x60 extin __PI_SUPPORT__
0x61 extout __PI_SUPPORT__
0x62 minn __PI_SUPPORT__
0x63 unpacksn __FPU_SUPPORT__
0x64 moutn __PI_SUPPORT__
0x65 xminn __PI_SUPPORT__
0x6C postnormsn __FPU_SUPPORT__
0x6D roundsn __FPU_SUPPORT__
0x71 ldinf __FPU_SUPPORT__
0x72 fmul
0x79 pop
0x7A seminit __PI_SUPPORT__
0x7B semclaim __PI_SUPPORT__
0x7C semrelease __PI_SUPPORT__
#ifdef __FPU_SUPPORT__
case \: ins_wsubdb(); break;
#endif
#ifdef __FPU_SUPPORT__ //in case of fpu support include the below
0x82 fpldnldbi
0x83 fpchkerr
0x84 fpstnldb
0x86 fpldnlsni
0x87 fpadd
0x88 fpstnlsn
0x89 fpsub
0x8A fpldnldb
0x8B fpmul
0x8C fpdiv
0x8E fpldnlsn
0x91 fpnan
0x92 fpordered
0x93 fpnotfinite
0x94 fpgt
0x95 fpeq
0x96 fpi32tor32
0x98 fpi32tor64
0x9A fpb32tor64
0x9D fprtoi32
0x9E fpstnli32
0x9F fpldzerosn
0xA0 fpldzerodb
0xA1 fpint
#endif
#ifdef __PI_SUPPORT__
0xA2 getpri
#endif
#ifdef __FPU_SUPPORT__ //in case of fpu support include the below
0xA3 fpdup
0xA4 fprev
0xA6 fpldnladddb
0xA8 fpldnlmuldb
0xAA fpldnladdsn
0xAC fpldnlmulsn
#endif
0xAD savecreg
0xAE restorecreg
0xB0 barinit
0xB1 barsync
0xB2 barresign
0xB3 barenroll
#ifdef __FPU_SUPPORT__ //in case of fpu support include the below
0xCF fprem
0xD0 i64toreal
0xD1 fpdivby2
0xD2 fpmulby2
0xD3 fpsqrt
0xD6 fprz
0xD7 fpr32to64
0xD8 fpr64to32
0xD9 fpexpdec32
0xDB fpabs
0xDF fpchki64
#endif
#ifdef __PI_SUPPORT__
0xE0 mnew
0xE1 mfree
0xE2 malloc
0xE3 mrelease
0xE4 min
0xE5 mout
0xE6 min64
0xE7 mout64
0xE8 xable
0xE9 xin
0xEA xmin
0xEB xmin64
0xEC xend
0xFD null
#endif
Zarutian 23. maí 2007: this page is still under construction
Zarutian 30. maí 2007: and yet I continue
Zarutian 14. september 2007:
namespace eval transputer {}
namespace eval transputer::assam {
variable assamble_buffer {}
proc get_assamble_buffer {} {
variable assamble_buffer
return [set assamble_buffer]
}
proc j {relative} {
variable assamble_buffer
if {$relative > 15} {
set tmp [expr $relative % 16]
pfix [expr $relative / 16]
set realtive $tmp
}
set tmp [format "%x" $relative]
append assamble_buffer "0[set tmp]"
}
proc pfix {literal} {
variable assamble_buffer
set tmp {}
if {$literal == 0} {
append assamble_buffer "20"
} else {
while {$literal > 0} {
set tmp [format "%x" [expr $literal % 16]][set tmp]
set literal [expr $literal / 16]
}
foreach i [split $tmp ""] {
append assamble_buffer "2[set i]"
}
}
}
proc ldc {constant} {
variable assamble_buffer
if {$constant > 15} {
set tmp [expr $constant % 16]
pfix [expr $constant / 16]
set constant $tmp
}
set tmp [format "%x" $constant]
append assamble_buffer "4[set tmp]"
}
proc ldnl {offset} {
variable assamble_buffer
if {$offset > 15} {
set tmp [expr $offset % 16]
pfix [expr $offset / 16]
set offset $tmp
}
set tmp [format "%x" $constant]
append assamble_buffer "3[set tmp]"
}
}
CMcC has worked on transputers and would like to say that the architecture is not well-suited to programming. For one thing, there are *no* global stores, and so writing malloc is quite difficult. Another oddity is that evaluating an expression like 1/0 hung the transputer by design.
FPX has also worked on transputers and disagrees with that statement. Transputers may not be well-suited for certain general purpose programming, but they shine at stream processing and other tasks. Lack of a global store is not an issue with stateless components (such as an image filter). "Hanging a transputer" with a division by zero is system-specific and not an inherent issue with transputers in general. Most transputers run single user operating systems, not having kernel/user space separation due to the lack of a MMU. These days, GPUs (graphics processing units) follow similar designs than Transputers. Yes, you wouldn't want them to run a word processor, but there are certain tasks that they do so much better than your general CPUs.
http://wotug.org/parallel/transputer/documentation/st020-450/datasheets/Category Concurrency |
[Category Parallelism
] 
